BlackForest EDA

Management

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Partners

Press Info

IP Products - Silicon IP

IP Products - Verification IP

Progressive EDA solutions for System Level Design and Functional Verification

Contact:
BlackForest EDA
Am Breil 28c
40667 Meerbusch, Germany
Juergen.Kessler@blackforest-eda.de
Phone: +49 2132 137 485
Fax: +49 2132 137 486
Mobile: +49 175 206 4543

News:

Avery Design Systems Announces AMBA AXI and AHB Verification Solution ...

Real Intent: Booth #25

DATE exhibition theatre

Antoine Druilhe from EDF Research and Development will be presenting:

“IEC 62566 compliant verification methodology of FPGA-Based Digital I&C Systems for Nuclear Applications”

Wednesday, March 10 at 13:00pm

BlackForest EDA is focused on Functional Verification and System Design solutions to help our customers to maximize Verification Productivity and speed up System Analysis. The portfolio consists of solutions from our partners Avery Design Systems, Real Intent, Mirabilis Design, HDL Works and Dashcourses complemented by ASIC/FPGA Design Service partners.

Hot spots are:

'SimCluster' for partitioning of large RTL and Gate level simulations,

'PCI-Xactor' and 'SATA-Xactor' test-environment for PCIe and SATA/PATA designs.

'EnVision' Family of Products for transparent formal Verification.

'VisualSim' for System Level concept development and optimization.

'EASE' for graphical HDL entry.

Frontend System - ASCI/FPGA Design and Verification Services.

Training Courses for I/O, Storage and other advanced technologies.

Self running demonstrations:

Verify your IO pins between PCB and FPGA using IO Checker: Self running demonstration

Partners

Please check the websites of our partners for technical details: